Program Overview
The program comprises of a
- Main Workshop with Lectures on January 9/10 at EPFL
- Retreat for Networking and Discussions with PhD Forum on January 11 in Leysin
(with extension possible to January 12)
| Thursday, January 9 EPFL |
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| Friday, January 10 EPFL |
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| Saturday, January 11 Leysin |
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| Sunday, January 12 | No official program |
Detailed Program
Download Announcement and Final Program as PDF here
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Thursday, January 9th 2014, Room : BC 420
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09:00 – 09:15
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Workshop Opening and Welcome
Andreas Burg, EPFL |
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09:15 – 10:15
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“Power Efficient Heterogeneous Integrated Systems”
Prof. Eby Friedman, University of Rochester |
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10:15 – 10:45
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“Computing with Leakage Currents”
Prof. Yusuf Leblebici, EPFL |
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10:45 – 11:15
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COFFEE BREAK and POSTER SESSION
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11:15 – 12:15
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“Handling Uncertainty and Approximation in Variability Affected Computing”
Prof. Rajesh Gupta, University of California San Diego |
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12:15 – 13:45
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LUNCH
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13:45 – 14:45
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“Computing in the Nanoscale Era – A Shannon-inspired Perspective”
Prof. Naresh Shanbhag, University of Illinois Urbana-Champaign |
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14:45 – 15:15
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“Ultra Low-Power Radios (including MEMS-based Radio)”
Prof. Christian Enz, EPFL |
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15:15 – 15:45
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COFFEE BREAK
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15:45 – 16:30
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“Bringing Low Power Sensing to the Marketplace – Technologies and Applications”
Dr. Matthias Streif, SENSIRION |
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16:30 – 17:15
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“Energy-efficient temperature sensors“
Prof. Kofi Makinwa, TU Delft |
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19:00 – 22:30
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Gala Dinner at the Restaurant Le Debarcadère in St-Sulpice
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Friday, January 10th 2014, Room : BC 420
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09:00 – 10:00
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“Energy-Efficient, Resilient Circuit Design in High-Performance Technologies”
Dr. Jim Tschanz, INTEL |
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10:00 – 10:30
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“Ultra-Low Power Systems-on-Chips and some Applications”
Prof. Christian Piguet, CSEM |
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10:30 – 11:00
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COFFEE BREAK and POSTER SESSION
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11:00 – 12:00
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“UTBB FD-SOI technology for Extreme Power Efficient SOCs”
Philippe Flateresse, ST Microelectronics |
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12:00 – 13:30
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LUNCH
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13:30 – 14:30
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“Managing variability in Near-threshold clustered multiprocessors“
Prof. Luca Benini, ETH Zurich |
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14:30 – 15:00
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“Exploiting Biosignals Features for Ultra-Low Power Personal Monitoring Systems”
Prof. David Atienza, EPFL |
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15:00 – 15:30
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COFFEE BREAK
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15:30 – 16:15
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“Digilog: Biosignal Sensing”
Prof. Dejan Markovic, UCLA |
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16:15 – 16:45
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“Alternative Embedded Near-VT SRAMs”
Prof. Joachim Rodrigues, LUND University |
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16:45 – 17:15
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Plenary Session: The Future of Low Power Design
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18:00
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Bus pickup for transfer to Leysin (with reservation)
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20:00
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Leysin Welcome Dinner Apero (sponsored by IEEE Switzerland)
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Saturday, January 11th 2014, Mercure Classic Hotel Leysin
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08:30 – 08:55
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“Low power trade-off in Fault Tolerant ASICs” Dr. Milos Kristic, IHP
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08:55 – 10:20
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PhD Forum Part 1: Short presentations (3 min. each)
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10:20 – 10:50
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COFFEE BREAK
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10:50 – 11:30
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PhD Forum Part 2: Posters
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11:30 – 11:55
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“Adaptive Hardware and Voltage Conversion, Novel Possibilities in Energy Savings”
Dr. Lauri Koskinen, Aalto Univ. |
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11:55 – 12:20
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“Design and Exploration of Inexact Floating-Point Architectures for Atmospheric Modeling”
Dr. Jaume Joven Murillo, EPFL |
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12:20 – 13:30
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LUNCH
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Activities: Hiking, Skiing, Enjoy the view, Snow Tobbogan
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PhD Forum Posters
Presentation information:
· The PhD forum will take place Saturday 11.01.2014 in Leysin comprising
o Preview session: a short 3 minutes pitch with 3-4 slides maximum (Part-1)
o Poster: A poster (A0) that will be on display in the poster session following the preview session (Part-2)
· Optional: posters can also be shown during the Friday Coffee Breaks of the main workshop at EPFL (for time slot see the program below)
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Friday 10.01.2014, MORNING coffee break & Saturday 11.01.2014
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David
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Bellasi
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ETHZ-IIS
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Low-Power Design Challenges of a Multi-Channel Biomedical Monitoring SoC
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Amiri Omid
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Talebi
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EPFL
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Design Methodology and Integration of a 1.8GHz Outphasing Power Amplifier for Mobile Terminals
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Michael
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Gautschi
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ETHZ-IIS
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A Customized, High-IPC OpenRISC Processor in an Ultra-Low Power Cluster with a Shared L1 Memory
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Pirmin
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Vogel
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ETHZ-IIS
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Efficient Parallel Beamforming for 3D Ultrasound Imaging
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Michael
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Schaffner
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ETHZ-IIS
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An Adaptive Approximate Computing Technique for Reducing the Complexity of a Direct-Solver for Sparse Linear Systems in Real-Time Video Processing
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Francesco
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Conti
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UNIBO
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Architectural heterogeneity: bringing many-cores in the dark silicon era
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Francesco
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Paci
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UNIBO
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Energy-aware People Counting in real-world WSN
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Guerric
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de Streel
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UCLOUVAIN
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Study of Back Biasing Schemes for ULV Logic from Gate Level to IP Level
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Francesco
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Fraternali
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UNIBO
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Monitoring and Resource Management Techniques for Energy Efficiency in Supercomputer Environment
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Jeremy
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Constantin
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EPFL
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Application-Specific Processor Design for Low-Complexity & Low-Power Embedded Systems
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Friday 10.01.2014, AFTERNOON coffee break & Saturday 11.01.2014
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Filippo
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Casamassima
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UNIBO
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Activity aware power management for motion sensing body area network nodes
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Viacheslav
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Yuzhaninov
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Bar Ilan
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Full-Swing Gate Diffusion Input logic: Case-study of low-power CLA adder design
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Andreou M.
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Charalambos
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Univ. of Cyprus
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Low-Power, Low-Area, Wide-Temperature-Range Voltage Reference for Energy Harvesting Systems
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Itamar
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Levi
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Bar Ilan
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Dual Mode Logic (DML) – Overview, concepts and use
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Babak
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Mohammadi
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Lund Univ.
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A 6.25um2 single stage 28fJ per cycle, 120mV to 1.2V Level Shifter
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Nikola
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Katic
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EPFL
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A 5.43-uW 0.8-V Sub-threshold Current-Sensing Sigma-Delta ADC for Low-Power Sensor Interfaces
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Matthew
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Turnquist
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Aalto Univ.
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DC-DC converter design constraints for adaptable microprocessors that target the minimum-energy point (MEP)
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Yasser
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Sherazi
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Lund Univ.
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Design Exploration of a 65 nm Sub-VT CMOS Digital Baseband
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Ubaid
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ur Rehman Ahmad
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IMEC
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A C-Programmable Reconfigurable ASIP for near-Optimal MIMO Detection Performance
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Pascal
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Meinerzhagen
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EPFL
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Embedded Memories: from Sub-VT to Error Resilient Systems
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